1. Field of the Invention
The present invention relates to a chip package structure. More particularly, the present invention relates to a chip package structure with a lead frame.
2. Description of Related Art
The production of integrated circuit (IC) devices is mainly divided into three stages including IC design, IC process and IC package.
During the IC process, a chip is manufactured by the steps of wafer fabrication, IC formation, wafer sawing and so on. A wafer has an active surface, which generally refers to the surface including active devices. After the IC inside the wafer is completely formed, a plurality of bonding pads is further disposed on the active surface of the wafer, such that the chip formed by sawing the wafer may be externally electrically connected to a carrier through the bonding pads. The carrier is, for example, a lead frame or a package substrate. The chip can be connected to the carrier by wire bonding or by flip chip bonding, such that the bonding pads on the chip are electrically connected to contacts of the carrier, thereby forming a chip package structure.
FIG. 1 is a schematic top view of a conventional chip package. FIG. 2 is a schematic cross-sectional view showing the conventional chip package of FIG. 1. For the convenience of illustration, please refer to FIGS. 1 and 2 which are schematic perspective diagrams seen through a molding compound 140. Only dotted lines are adopted in FIGS. 1 and 2 for showing the profile of the molding compound 140. The chip package 100 includes a lead frame 110, a chip 120, a plurality of first bonding wires 130, a plurality of second bonding wires 132, a plurality of third bonding wires 134, and the molding compound 140. The lead frame 110 includes a die pad 121, a plurality of inner leads 114, and a plurality of bus bars 116. The inner leads 114 are disposed at the periphery of the die pad 112. The bus bars 116 are disposed between the die pad 112 and the inner leads 114.
The chip 120 includes an active surface 122 and a back surface 124 which are opposite to each other. The chip 120 is disposed on the die pad 112, and the back surface 124 of the chip 120 faces the die pad 112. The chip 120 includes a plurality of ground contacts 126 and a plurality of non-ground contacts 128 having a plurality of power contacts and a plurality of signal contacts. The ground contacts 126 and the non-ground contacts 128 are both disposed on the active surface 122.
The first bonding wires 130 electrically connect the ground contacts 126 to the bus bars 116. The second bonding wires 132 electrically connect the bus bars 116 to ground leads of the inner leads 114. And the third bonding wires 134 electrically connect the rest of the inner leads 114 to the corresponding second contacts 128, respectively. The molding compound 140 encapsulates the die pad 112, the inner leads 114, the bus bars 116, the chip 120, the first bonding wires 130, the second bonding wires 132 and the third bonding wires 134.
It should be noted that the conventional chip package structure 100 utilizes a patterned lead frame in the packaging process. The lead frame 110 includes one die pad 112, a plurality of the inner leads 114 and a plurality of the bus bars 116. However, masks required in the photolithography process of patterning the lead frame are rather expensive, thereby increasing additional manufacturing costs of the lead frame.